1. Field of the Invention
The present invention relates to a bare chip prober device for a bare chip operation test and burn-in test and a bare chip handling method and, in particular, to a device adapted to mount a bare chip on a test board or burn-in board in a bare chip operation testing or burn-in testing and a tape reel with bare chips carried thereon.
2. Description of the Related Art
In the case where a bare chip with, for example, solder or gold bumps formed thereon is to be mounted on a substrate in a flip-chip fashion, it is necessary to use a bare chip whose operation reliability is ensured. In order to prove the reliability, a burn-in test is carried out.
At the burn-in test, unlike a semiconductor device mounted in a package, the bare chip cannot be mounted directly on a burn-in board. As shown in FIG. 7A, the bare chip 1 is mounted on a carrier 22 and the carrier 22 is held in place in a socket above the burn-in board. In this way, the reliability test is carried out.
FIGS. 8A to 8C show the conventional method for mounting the bare chip 1 on the carrier.
Bump electrodes 25 are formed on the chip 1 and formed of, for example, a high-melting-point 90-Pb/10 Sn solder. An electrode 26 is provided on the carrier 22 and an eutectic solder 27 is provided on the electrode 26. The bare chip 1 is placed on the carrier 22 in a manner to set the bump electrode 25 in contact with the eutectic solder 27 above the electrode 26. Then, the eutectic solder 27 is melted to allow the bump electrode 25 to be soldered to the electrode 26.
In the method for mounting the bare chip 1 on the carrier 22 by soldering, after the test has been done, it is necessary to separate the chip 1 away from the carrier 22 so that the chip 1 may be actually mounted on a substrate. For this reason, there is a high possibility that damage will be caused to the bump electrode 25 and chip 1. This method can be applied to the bump electrode using a high-melting-point solder, but it cannot be used for an eutectic solder and gold bump electrodes, thus presenting a problem.
FIG. 9 shows another method for mounting the bare chip on the carrier.
Solder bump electrodes 8 are provided on the chip 1. First, the chip 1 is located in an interposer 29 which is, in turn, located on the carrier 22. Thereafter, a cover 21 with rubber 20 attached to its lower surface is placed over the carrier 22 with the interposer 29 and chip 1 in between and is fixed to the carrier 22 by a fastening means 28. As a result, the chip 1 is held in the carrier 22 with the interposer 29 in between.
This method poses the problem with the chip-to-carrier alignment as well as the manufacturing accuracy of the chip and carrier. The greater the number of the bumps 8, the more difficult it is to achieve adequate accuracy so that all the bumps on the chip 1 are contacted with the corresponding electrodes of the carrier 22.
Bare chips 1 are conveyed to a chip tray 19 as shown in FIG. 7B, before and after the test, in a manner to be on the chip tray 19.
In the case where the chips 1, being carried on the chip tray 19, is handled, it takes a lot of time to place the bare chips onto the chip tray 19 or it is necessary to wash the chip tray 19 or to use a different chip tray if the size of the chips 1 is different, thus preventing the problem of preparing more chip trays of different sizes.
In the case where the carrier is used, it has to be manually handled in a bare chip operation confirmation test to be done before and after the burn-in process, thus lowering the test efficiency.